### Rectifying Contacts - Derivation

Introduction: This section gives brief explanation about the rectifying contacts with derivation:

Rectifying Contacts:

• When we apply a forward bias voltage V to the Schottky barrier shown in fig. b, the contact potential is decreased from V0 to V0-V(fig. a).
• As a result, electrons in the semi conduction band can diffuse across the depletion region to the metal.
• This help in producing the forward current (metal to semiconductor) through the junction.
• Conversely, the barrier is increased to V0 +Vr by the reverse bias, and there is negligible flow of electron from semiconductor to metal.
• In any of the case, electron flow from the metal to the semiconductor is slow down by the barrier Fm - x.
•  The resultant equation of diode is equivalent to that of p-n junction.

as suggested by figure c. Here, the reverse saturation current I0 is not derived simply as it was done in the case of p-n junction.

• One crucial feature which can be predicted intuitively, however, is that the saturation current should be dependent on the barrier size FB for injection of electron from the metal in the semiconductors.
• This barrier (for ideal case it is Fm - x as represented in fig.) is not affected by the bias voltage.
• We expect that we can find the probability of an electron which is surmounting this barrier with the help of Boltzmann factor. Therefore,

• In both cases, the Schottky barrier diode is rectifying, with small current in the reverse direction and easy flow of current in the forward direction.
• It is also noted that in each case the forward current is due to majority carriers injection from the semiconductor in the metal.
• The absence of injection of minority carriers and the related delay in storage is a notable feature of  Schottky barrier diodes.
• However some minority carrier injections occurring at high levels of current, these are essentially majority carrier devices.
• Their switching speed and properties related to high-frequency are thus better than usual p-n junctions generally.

### Depletion Capacitance - an introduction

Introduction: Mainly, there are two types of capacitance related with a junction:
1. The capacitance of junction because of the dipole in the transition region.
2. The charge storage capacitance rising from the lagging behind of voltage as the current changes with the effects of charge storage.
Depletion Capacitance:

The junction capacitance is overriding under the conditions of reverse-bias and the charge storage capacitance is overriding if the junction is forward biased. In several applications of p-n junctions, for usefulness of the device the capacitance is a limiting factor. In place of the common expression C=Q/V, which is implemented on capacitors where charge is linear function of voltage, we should use the definition which is more general

As the charge Q varies on each side of the transition region in non linear manner,

we should use the changed value of the electrostatic potential barrier (V0 – V). Then, the right expression for transition region's width is

We can write value of Q in terms of width of transition region and the concentration of doping on each side of the junction.

Connecting the total width of the transition region W to the individual widths xp0 and xn0

and thus the charge on dipole's each side is

After that the junction capacitance Cj can be written as

### Determination of Schottky-barrier with the help of measuring the activation energy

The main benefit of determination of Schottky-barrier with the help of measuring the activation energy is that we do not need any assumption of electrically active area. Particularly, this feature is crucial in the investigation of unusual or novel metal-semiconductor interfaces as we are not aware of the true value of the contacting area.

Activation-Energy Measurement:

If the surfaces are incompletely reacted or cleaned poorly then there will be only a little fraction of the geometric area in the electrically area. On the other side, a strong metallurgical reaction could provide rough nonplanar interface of metal-semiconductor with an electrically active area which is greater than the obvious geometric area.

The electrically active area, we get

where       is believed to be activation energy. For a limited temperature around the room temperature, the value of A** and Fbn are necessarily independent of temperature.

Therefore, for a fixed forward bias VF the slope of a plot of In(IF/T2) versus 1/T provides the barrier height Fbn and the ordinate intercept at 1/T = 0 gives the multiplicative result
of the electrically active area A and the effective Richardson constant A**.

To show the importance of the method of activation-energy in the investigation of interfacial metallurgical reactions, Fig. provided below gives the plots of activation-energy of the saturation current in Al-n-Si contracts of different heights of barrier, easily formed by annealing at different temperature.

The slopes of the plots depict an almost linear increase of effective Schottky barrier height from 0.71 to 0.81 V for annealing temperature between range of 450o C and 650o C.
The C-V and I-V measurements also provide confirmation for these observations.
Also, supposedly when the Al-Si eutectic temperature (= 580°C) is achieved, the genuine metallurgical nature of the interface of metal-semiconductor must be modified considerably.
Determining the ordinary intercepts from the plots represented in the fig. show that the electrically active area enhances by factor of two, when the temperature of annealing exceeds the temperature of Al-Si eutectic-temperature.

### Schmitt Trigger - Detailed explanation

Introduction: The section below is the explanation for the Schmitt Trigger.

Schmitt Trigger:

• If there is any sort of noise as an input to the comparator, the output can be in the  erractive situation when vin is closer to the trip point.
• For case in point, with parallel to a zero crossing, there is the lowest output wherein vin is in positive range and highest in case of negative vin.
• Other than this, if the input consists of a noise voltage along with the peak of greater or equal to 1mV, then in such a case the comparator will notice the zero crossing developed by noise.
•  Fig 1.1 displays the zero crossing output discovery if there is noise in the input.
This can be kept away from by making use of a Schmitt trigger, the circuit that is  on the whole a comparator having a positive feedback. Fig 1.2, depicts the reciprocal inverting Schmitt trigger circuit with OPAMP.
• With a reason of voltage divider circuit, it consist the positive feedback voltage.
• In a situation wherein OPAMP is saturated positive, then in such a case, a positive  voltage is the resultant feedback to the input that is non-inverting input, holding the output in the higher stage. (vin< vf).
• With the negatively saturated output voltage, a feedback that is negative voltage to the case inverting input, investing the output in the lower state.
• Next the output being +Vsat, then here the reference voltage Vref is known by

• If Vin is counted lesser in comparison to Vref then the output will continue to be +Vsat.
• When input vin hands to greater than Vref = +Vsat the output, it switches from +Vsat to –Vsat. Here the reference voltage shall be given by

• The output will continue to be –Vsat as long as vin > Vref.
 Fig.1.3 Fig. 1.4

### Non-inverting Schmitt trigger - An introduction

Introduction: The section below is the detailed explanation of the Non-inverting Schmitt Trigger.

Non-inverting Schmitt trigger:

• In the case hereby, feedback is provided at the non-inverting terminal.
• The inverting terminal is here grounded and along with this, the input voltage is apparently connected to the non-inverting input. fig1. 1, depicts a non-inverting Schmitt trigger circuit.

Fig. 1.1
• For the circuit behavior analysis, lets make an assumption that the produced output is saturated negative.
• Then the feedback voltage is also negative (-Vsat). Then the feedback voltage is also negative.
• This feedback voltage will hold the output in negative saturation until the input voltage becomes +ve as much as required to result into making voltage positive.

• When vin  turns to be positive and eventhe magnitude is higher than than (R2 / R1) Vsat, then in such a case, the output turns to +Vsat.
•  Therefore, the UTP at which the output switches to +Vsat, is given by

• Similarly in the case wherein the output is at the saturation that is positive, feedback voltage is definitely positive.
• To turn out to the output states, then input voltage has become negative enough to make.
• When it happens, the output amends to the negative state from positive saturation to negative saturation voltage negative.

### Relaxation Oscillator

Introduction: The following explains the form by which the rectangle shape waves are attained with the support of Relaxation Oscillator.

Relaxation Oscillator:

• With affirmative feedback it becomes possible to develop relaxation oscillator that leads to formation of rectangular wave.
•  The circuit is shown in fig1.1

Fig. 1.1

• In the circuit as above, a fraction R2/ (R1 +R2) = b of the produced output is actually the feedback to the input terminal that is non-inverting.
• The procedure of the circuit can be put in plain words as follows:
• Assume that +Vsat is the output voltage. The capacitor will charge exponentially toward +Vsat.
• The feedback voltage is +bVsat. When there is a rise in the capacitor voltage, the output  +bVsat switches from +Vsat to -Vsat.
• The feedback voltage becomes -Vsat and the output will remain –Vsat.
•  Thereafter the capacitor charges in the opposite direction. When the situation arises wherein the voltage decreases below –bVsat (more negative than –bVsat) , in that case, the output again turns up +Vsat.
• This process works in continuation and leads to the production of a square wave. Under stable state conditions, the capacitor voltage and output voltage are shown in fig1.1.
• The incidence of the output can be obtained as follows:
• The capacitor charges from -ß Vsat to +ß Vsat in the phase time period T/2. The capacitor charging voltage expression is given by 123.

• In the frequency range of 10Hz to 10KHz, this square wave generator is immensely useful.
•  At elevated frequencies, the slew rate of the OPAMP confines the slope of the produced output square wave.

### Triangular Wave Generator

Introduction: The following section that is given below is the complete explanation of the Triangular Wave generator.

Triangular Wave Generator:

• In the relaxation oscillator conferred in the preceding lecture, capacitor voltage VC has he shape of an approximately triangular wave but the sides of the triangles are exponentials instead of being a sharp straight line.
• In order to make the triangle linear size, it is essential that C be concluded as the charge with a stable current rather that being the the exponential current through R.
• The superior circuit is shown in Fig1.1

Figure 1.1

• In the given circuit an OPAMP Integrator is being used in order to supply a constant current to C in order to get a linear output.
• Because of the inversion from the Integrator, the voltage is actually the fed back to the terminal that is non-inverting of the comparator instead of the inverting terminal. The rle of inverter is as a non-inverting Schmitt trigger.
• The voltage vR is utilized to change the dc stage of the triangular wave and addition to this, voltage vs is utilized to alter the slopes of the waves that are triangular as shown in fig1.2

Fig. 1.2
• To get the result as maximum value in response of the triangular waveform presume that the square wave voltage vO is at its negative value = -Vsat.
• With a negative input, the output v (call) of the Integrator is actually the raising ramp. The voltage denoting at the non-inverting comparator input v1 is expressed by

### Differnetial Amplifier - An introduction

Introduction: Differential amplifier is a basic building block of an op-amp. The main task of a differential amplifier is to amplify the difference between two input signals.

Construction of Differential Amplifier:

• Let us consider two emitter-biased circuits as represented in fig. 1.1

Fig. 1.1
• The characteristics of two transistors Q2 and Q1 are identical.
• The circuits have equal resistances, that is RE1 = RE2, RC1 = RC2 and the magnitude of –VEE and +VCC are equal. We can measure the voltages with respect to ground.
• To make a differential amplifier, the two circuits are attached together as represented in fig. 1.1. The two +VEE and +VCC provides terminal are formed common because they are similar.
• We exchange the parallel combination of RE1 and RE2 with resistance RE and the two emitters are connected also.
• The two input signals v1 & v2 are applied at the base of Q1 and at the base of Q2. The output voltage is taken between two collectors.
• The resistances of the collectors are equal and thus denoted with the help of RC = RC1 = RC2.
• In ideal situation, the output voltage is zero when the two input values are equal. In case v1 is more than v2 then the output voltage with polarity shown appears. Also, if v1 is more than v2 then the polarity of output voltage is opposite.
• The configurations of differential amplifiers are different.
• The configurations of four differential amplifiers are provided as:
• Dual input, unbalanced output differential amplifier.
1. Dual input, balanced output differential amplifier.
2. Single input unbalanced output differential amplifier.
3. Single input balanced output differential amplifier.

### Dual Input, Unbalanced Output Differential Amplifier

• These configurations are represented in fig 1.2 and are defined by the number of input signals used and the manner in which output voltage is calculated.
• In case of two input signals, the configuration is known as dual input, otherwise it is a single input configuration.
• On the other hand, in case the output voltage is determined between two voltages, it is known to as a balanced output because the dc potential of both the collectors are same with respect to ground, the configuration is known as unbalanced output.
• A multistage amplifier having a required gain can be determined with the help of direct connection between successive stages of differential amplifiers.
• The benefit of direct coupling is that the lower cut off frequency is removed which is imposed by the coupling capacitors, and thus they have the ability of amplifying both ac input signals and dc input signals.

### Basic digital-circuit building blocks of both logic and memory circuits

Introduction: Herein this section, the basic digital-circuit building blocks of both logic and memory circuits are presented. The basic unit for a logic circuit is an inverter. Different configurations for MOSFET inverters.

Basic Circuit Blocks:
Most commonly used is CMOS (complementary MOS) inverter where both p-channel and n-channel transistors are used. This logic uses extremely low dc power as one of the transistors in series remains off whether the input is low or high and so very little steady-state current (sub-threshold current) passes through them.

This is, in fact, one of the biggest advantages and applications of MOSFETs in which the insulated gate can tolerate input voltage of any polarity. Such arrangement with bipolar transistors or MESFETs is quite difficult to maintain if a large resistor in not put in front of the input.

In NMOS logic (shown in Fig. b), load of p-channel transistor is substituted with a depletion-mode n-channel transistor. The clear advantage of using this simpler technology is that it does not require a p-channel device at the expense of higher dc power.

This kind of a depletion-mode device with the gate tied to the source is a two-terminal non-linear resistor basically, which is an improvisationover a simpleresistor load that is shown in Fig. c.

Two elementary MOSFET memory cells, for DRAM (dynamic random-assess memory) and SRAM (static random-access memory) circuits, are illustrated in Fig. below. There are two CMOS inverters connected back to back in a SRAM cell. It is a latch and a stable cell but it needs four transistors (six which includes controls for word line and bit line).

The memory density of DRAM cell is very high as it just uses one transistor. The memory is stored as a charge across its capacitor. As there is finite charge leakage in the non-ideal capacitor, the cell requiresperiodic refreshing, typically at a frequency of 100 Hz.

### Introduction to MOSFET

Introduction: MOSFET is an ideal transconductance amplifier which has infinite input resistance and a current generator at the output. However, in practice, there are several other non-ideal circuit elements.

Equivalent Circuit and Microwave Performance:  An equivalent circuit for common-source connectionis shown in Fig. given below. The gate resistance RG is associated with the gate contact material over the oxide.

The input resistance i.e. Rin is an outcome of tunneling current through the thin gate insulator, and also includes conductance through defects.This is nothing but a function of oxide thickness.

For a silicon dioxide layer i.e. thermally grown, the leakage current between gate and the channel is trivial; so the input resistance is very high, i.e. one of the main advantages of a MOSFET.

For oxides below thickness of 5 nm, tunneling current becomes a significant factor.
In the saturation region, VD and thus RD has little effect on the drain saturation current.

The Rs affects effective gate bias, and the extrinsic transconductance is calculated with help of
equation (1)

When the microwave performance is analyzed, and the cutoff frequency fTi.e. defined as the frequency for unity current gain (i.e. the ratio of drain current to gate current) is attained,

equation (2)

In ideal case where there is zero parasitics, it can be illustrated that

equation (3)

For very large source and drain resistances, the comprehensive expression is  given by

equation (4)

The other figure-of-merit

### Schottky-Barrier Source/Drain MOSFET

Introduction: In lieu of p-n junction, use of Schottky-barrier contacts for source and drain of a MOSFET can give some benefits in assembly and performance.

Schottky-Barrier Source/Drain:
Figure depicts a schematic MOSFET structure with such Schottky source and drain. For Schottky contact, junction depth can be effectively made zero to abate the short-channel effects.

n-p-n bipolar-transistor action is also absent for undesirable effects such as bipolar breakdown and latch-up phenomenon in CMOS circuits. Removing high-temperature implant anneal encourage better quality in oxides and better control over geometry.

Additionally, this structure can be formed on semiconductors likeCdS where p-n junctions can’t be easily formed.

Figures b-d illustrates the working principle of Schottky source drain. At thermal equilibrium with VG = VD = 0, metal’s barrier height to the p-substrate for holes is qFBp (e.g., 0.84 eV for an ErSi-Si contact).

When gate voltage is above threshold so as to invert the surface from p to n-type, barrier height between source and the inversion layer (electrons) is qFBp= 0.28 eV.

It is to be noted that source contact is reverse biased under operating conditions (shown in Fig. d).

For a 0.28-eV barrier at room temperature, thermionic-type reverse-saturation current density is required to be of the order of 103 A/cm2

To accentuate current density, metals should be selected to yield highest majority-carrier barrier sothat minority-carrier barrier height is minimized.
Surplus current arising due to tunneling through the barrier should help in improving the channel carriers supply.
Currently, forming the structure on a p-type Si substrate for n-channel MOSFET is much moredifficult as compared to p-channel device with n-substrate, because silicidesand metals that yieldhuge barrier heights on p-type silicon are less common.
The main drawbacks of Schottkysourceldrain are high series resistance due to higher drain leakage current and finite barrier height.

### Power MOSFETS - DMOS & LDMOS

Introduction: Generally, power MOSFETs having longer channel lengths employ deeper junctions and thicker oxides. This also posts a penalty on device performance like the transconductance (gm) and speed ( fT). Yet, power applications from MOSFETs are on a rise, thanks to requirement of very high voltage, for instance, by cellular phones and cellular base stations which are in high demand.

DMOS:
As implied, in DMOS (double-diffbsed MOS) transistor illustrated in Fig. (a), the higher diffusion rate of p-dopant (e.g., boron) against the n+-dopant (e.g., phosphorus) of the source helps in determining the channel length. This technique is capable of producing very short channels and do not depend on lithographic mask.

The p-diffusion has good punch-through control and serves as channel doping. A lightly doped n- - drift region follows this channel. This drift region is relatively long compared to the channel and also minimizes the highest electric field in this region by maintaining a uniform field. The drain is usually located at the substrate contact.

The field near the drain is and the drift region is same and thus, avalanche breakdown, multiplication and oxide charging are diminishedin comparison to conventional MOSFETs. However, it is pretty much difficult to control the threshold voltage VT in a DMOS transistor as channel doping is not constant along its length.

As VT is determined by local doping concentration along the surface of the semiconductor, varying doping level results in variations in VT as a function of bias and distance.
Besides, the localization of punch-through control by a thin p-shield region requires a higher doping level in comparison to a conventional structure and it results in much poor turn-off behavior for DMOS transistors.

LDMOS:  The main difference between LDMOS (laterally diffused MOS) transistor (shown in Fig. b) and a DMOS transistor is that it has a lateral current-flow pattern. Herein this, the drift region is an implanted horizontal region.

This type of horizontal arrangement renders p+-substrate with the ability to deplete this drift region at high drain bias. Nevertheless, at low drain bias, it’s higher doping creates lower series resistance.
Thus, the drift region behaves as a nonlinear resistor. At low drain bias, its resistance is determined using 1/nqµ. At high drain bias, this region is fdly depleted to support a large voltage drop.
This concept is known as RESURF (reduced surface field) technology.

Due to this feature, drift region can be doped with much higher concentration than DMOS transistor for a lower on-resistance. The other advantage of LDMOS transistor is that source can be internally tied to the substrate with help of deep p-type diffusion.This prevents the use of a bond wire with high inductance to the source.

Thus, LDMOS transistor can perform at higher speed.

### Silicon on insulator & thin film transistor

Introduction:  Herein this article, the SOI and thin-film transistor (TFT) will be described in the following way.

SOI:
In contrast to thin-film transistor, top silicon layer of an SOI (silicon-on-insulator) wafer is a premium-quality single-crystalline material i.e. apt for high-density and high-performance integrated
Several forms of SOI structures have been demonstrated using different holding substrates and insulator materials.

These consist of silicon-on-oxide, silicon-on-sapphire (SOS), silicon-on-zirconia (SOZ), and siliconon-nothing(air gap). In SOZ and SOS technologies, upon a crystalline insulating substrate, single-crystalline silicon film is epitaxially grown. In these, insulators themselves serve as the substrates, ZrO2 in SOZ and Al2O3 in SOS.

The difficultywith these techniques is that the material quality gets disturbed when the film gets thinner. The most popular is the one that was the first option and which used oxide as an insulator and another that used Si wafer as the holding substrate. There are several ways to construct this structure. One is where SIMOX (separation by oxygen implantation) is used and where high-dose oxygen is implanted onto a silicon wafer followed by annealing at high temeparture to create buried SiO2 layer.

In another technique, bonding of two silicon wafers is involved. One silicon wafer has an oxidized layer followed by thinning or completely removed majority of the top wafer until a thin silicon layer is left. In one technique, lateral epitaxial growth of silicon over an oxide layer is usedthat starts from a seed opening to the substrate.

Another technique employs laser recrystallizationthat transforms amorphous silicon deposited on the oxide layer to single-crystalline material, or poly-crystalline form with large grain size. A schematic diagram of n-channel MOSFET made on an SOI substrate is shown in Figure (a) with its typical I-Vcharacteristics illustrated in Fig. (b). The kinks which are associated with floating body lacking a substrate tie are easily noticeable.

Thin-Film Transistor (TFT): The thin-film transistor is usually referred to as MOSFET unlike other types of transistors. Their structure is same as MOSFET that is built on SOI except for that their active film is a deposited thin film while it may have any form of substrate.

Since a semiconductor layer is formed by deposition, there are more defects and imperfections in amorphous material than single-crystalline semiconductors and that results in more complex transport processes in TFT. To improve the performance, reliability and reproducibility of a device, the bulk and interfacetrap densities must be diminished to reasonable levels.
Due to lower mobility, current in a TFT is always quiterestricted and leakage current is always higher because of defects.

Its main applications are in those areas where a flexible substrate or large-area is required and it is not feasible to carry out conventional semiconductor processing. Its fine example is a large-area display where an array of transistors in turn controlsan array of lighting elements.

In such applications, device performance parameters such as speed or current are not critical.

### Source/Drain Design - Lightly doped drain

Introduction: The extension close to the channel has shallower junction depth that minimizes short-channel effects. Sometimes, it is less heavily doped to diminish the lateral field for considering hot-carrier aging.

Source/Drain Design:
For this purpose, it is referred to as lightly doped drain (LDD). The deeper junction depth away from the channel helps in minimizing the series resistance.

The gradient or sharpness of the source/drain profile is crucialfor minimizing series resistance as pointed out earlier. Fig. below serves as a reference to understand its origin.

The profile is never perfectly abrupt practically, and there is a region of accumulation layer (of n-type) before current starts spreading in bulk of the source/drain. This accumulation-layer resistance Rac is associated with the transition distance prior to doping attaining a critical level.

The development of the silicide contact technology, which began in early 1990s, was a milestone for source/drain design. In contrast to metal contact, silicide can be made to self-align to the gate, therebydiminishing the sheet-resistance component (Rsh) between contact and the channel.

In this manner,silicide becomes the metal contact as the contact resistance between metal and silicide is very insignificant. This self-aligned silicide process has been coined silicide which is described as follows.

After the gate definition, an insulator spacer is created on the gate sides. A metal layer for silicidation is uniformlydeposited and at this stage shortens the gate and source/drain. After thermal reaction occurs at low temperature (= 450°C), metal reacts with silicon on the sourceldrain regionto form silicide.

Its formation on the gate is optional and it depends on whether the gate is capped or not with insulation layer i.e. a part of the gate stack. Metal found over the spacer region and the field region (between transistors, i.e. not shown) remains as metal since no exposed silicon is available for reaction.

Then, metal is removed with a selective chemical that only etches metal without etching silicide, thereby eliminating the shorting paths. It is to be noted that silicide/silicon interface is somewhat recessed due to the intake of silicon during formation of silicide.

Examples of salicidesare , Nisi2, CoSi2, TiSi2and PtSi.

### Drain-Induced Barrier Lowering (DIBL)

Introduction: It’s pointed out already that when source and drain depletion regions form a substantial fraction of channel length, short-channel effects begin to take place. In extreme cases when sum of these depletion widths will approach the channel length (ys +yD = L), effects will be more serious. This condition is commonly known as punch-through. Its net result is a large leakage current between source and drain and this current is a strong function of the drain bias.

Drain-Induced Barrier Lowering (DIBL):

The punch-through originates from the lowering of barrier close to the source, commonly called as DIBL (drain-induced barrier lowering).

When drain is near the source, the drain bias is capable of influencing the barrier at the source end, such that channel carrier concentration at that location does not remain fixed.

This occurrence is demonstrated by energy bands along the surface of the semiconductor, as shown in Fig. below.

A drain bias can alter the effective channel length but the barrier at the source end remains constant for a long channel device. However, for a short-channel device, the same barrier is no longer fixed.
When the source barrier is lowered, it causes an injection of extra carriers that increases the current significantly.

This increase shows up in subthresholdand above-threshold regimes.

It is shown in the Figure given above that punch-through condition is observed at the semiconductor surface. In practically used devices, substrate concentration is reduced below the depth of sourceldrain junction which broadens the depletion widths so that punch-through can also occur via a path in the bulk.

The punch-through drain voltage can be assessedusing depletion approximation as
equation (1)

The space-charge-limited currentwill dominate the drain current:

equation (2)

where A is cross-sectional area of the punch-through path. The space-chargelimited current increases gradually with VD2 and is parallel to inversion-layer current.

The calculated points as shown in the figure are obtained from a 2-dimensional computer calculation that incorporates the field-dependent mobility effect and punch-through effect.

### Use of control systems in day-to-day life

It is easy to raise heavy things with the help of the control system. Without control system, one will find it exceedingly difficult practically. Huge antennas can be pointed towards farthest points of the universe so that faintest radio signal can be picked. Control of these antennas with the use of the hand is almost impossible.

It is with the support of control systems; elevators can carry us at high speed to the desired destinations with automatic stopping at the correct floor. The power requirement for speed and load cannot be provided only by us only. It is the motors that support the power, the control systems monitor and regulate speed as well as position.

Reasons for developing control systems are:
• Power amplification
• Disturbances compensation
• Input Form convenience
• Power amplification
For example, The Radar Antenna needs a larger quantity of power or force to generate the output as rotation when sited by a low power rotary motion of a knob as its input. The required power gain or power amplification can be formed by the control system. These are beneficial so as to overcome the difficulties of a functioning human.

Control systems are beneficial in dangerous or remote locations like a remote controlled robotic arm to pick up the material is a better option in a radioactive environment. Control systems make the things convenient by varying the type of input. As in the case of temperature control system, the output heat is generated by the position on thermostat as input.

Normally, such variables are controlled as per the temperature in the thermal systems whereas in mechanical systems, velocity and position and in electrical systems as current, voltage and frequency in the electrical systems.

The system must provide the right output even in the situation wherein there is a disturbance of any kind. For example, take the system of antenna that points towards the commanded direction.
• The system should spot the disturbance and rectify the position of the antenna if the antenna is forced by the wind in contrast to the commanded direction or if any sort of noise comes internally.
• There is no change or variation in input, in case of rectification or correction.
• In the general case, the disturbance is measured by the system which has resulted in the repositioning of the antenna. Thereafter changes the direction of the antenna to a commanded position as per the input.

### Components of a control system - Introduction 2

In the context of a control system, the major components are the subsystems and the process (also known as plants). These are assembled to fetch the desired result or output as per the performance as per the given input. As highlighted in the Fig. The control systems are concerned to be the easiest form in which the input is a clear depiction of desired outputs. As an example, take in concern an Elevator. Here, when a person standing on 4th floor calls the elevator at first floor presses the button, gets the output as elevator to him that is designed with a system with floor leveling accuracy and speed.

The push received from the 4th floor button of the elevator is the input that results to an output desired. The elevator's performance is depicted through the response curve shown in the figure. The prime performance measures in this regard are: (a) the steady-states error (b) the transient response.

In persistence to the example, the comfort and patience of the passenger are based on transient response. The faster response may lead to sacrifice in the comfort level, whereas the patience level is sacrificed with slower response.

Other than this, the error of steady-states is yet another vital specification of performance. With this convenience and safety are sacrificed to improper working of elevator.

Elevator Response

Examples of Control-System Applications
• Intelligent Systems
• Hardware in the Loop and control in the fundamental Prototyping
• Smart Transportation Systems.
• Drive-by-wire and Driver Assist Systems
• Integration and Utilization of Advanced Hybrid Power trains
• Health Monitoring, Diagnosis  and High Performance of the Real-time Control
• Steering Control of an Automobile
• Idle-Speed Control of an Automobile

### Introduction to control systems

In the recent time, the role of control systems has occupied an integral position in advancement and development of modern technology. If we check in our regular practice, we will find that there are several aspects that are affected by some or the other control systems.

There are quite a lot control systems that can be probably found in various industry sectors. For instance, quality control is implemented in automatic assembly lines, space technology, machine-tool control, robotics, power systems, nanotechnology, MEMS, transportation systems etc.
Other than this, inventory control, socio-economic systems can be targeted through the automatic control theory.

In this regard, it is essential to note that the control systems have a vital role in the modern society. A glance on what is around: The space shuttle lifting the orbit of the earth, the rocket fire, automatic machining the metallic part of a machine, auto ignition to a vehicle gliding in the air parallel to the floor and reaching the destination. These are a few examples of exclusive automatic control systems that are being created by us. However, these control systems are not just human created but also exists in nature. In our own body, the system of the pancreas is regulating the blood sugar, eyes follow the object that moves and keep it in view, and our hands can hold an object and keep it in a desired place. Also, a model can depict the control over student's performance. This can be seen through the inputs such as the study time that a student has and the output shall be the grade he/she obtains. The input that needs to be entered into the model is the study times that student's have and with this output received is the grades. This will vary the grades to rise if the study time increases. This way the said model is useful to determine the worth of increased study in comparison to the previous results when the input was different.

The basic element of an organized control system can be depicted by:

1. Purpose of control.
2. Components of control-system.
3. Output / Result.